Understand the use of Karnaugh 010 in binary option. Draw maps for Multi input circuits.

Derive Karnaugh maps from truth tables. Make choices in cell selection to achieve a desired circuit result. Use manual and software methods for circuit minimisation. Minimise complex Boolean equations using appropriate software. Karnaugh Maps offer a graphical method of reducing a digital circuit to its minimum number of gates.

The map is a simple table containing 1s and 0s that can express a truth table or complex Boolean expression describing the operation of a digital circuit. The map is then used to work out the minimum number of gates needed, by graphical means rather than by algebra. The shape and size of the map is dependent on the number of binary inputs in the circuit to be analysed. The map needs one cell for each possible binary word applied to the inputs.

Important: Notice that this edge numbering does not follow the normal binary counting sequence, but uses a Gray Code sequence where only one bit changes from one cell to the next. The input labels are written at the top left hand corner, divided by a diagonal line. The top and left edges of the map then represent all the possible input combinations for the inputs allocated to that edge. 1 is a 3 input map, input C on the left hand edge only has two possible combinations, 00 and 01. This map is therefore rectangular rather than square to cover the 8 possible combinations available from 3 inputs. The Karnaugh map can be populated with data from either a truth table or a Boolean equation. Boolean expressions derived from each input combination that results in a logic 1 output.

This table will serve to show the process of transferring the data from Table 2. 1 into the cells of the Karnaugh map. The process is shown step by step in Fig. Boolean expression M in the Boolean column. Boolean expression MC in the Boolean column. 0 so this row is ignored. Boolean expression AC in the Boolean column.

Boolean expression AM in the Boolean column. Boolean expression of AMC in the Boolean column. All the truth table rows that produced a logic 1 have now been entered into the map and those lines that produced a logic 0 can be ignored, so the remaining three cells are left blank. Later it will be shown that these blank cells can be useful when mapping larger circuits, but for now the map is ready for simplification. Simplifying Karnaugh Maps Circuit simplification in any Karnaugh map is achieved by combining the cells containing 1 to make groups of cells. In grouping the cells it is necessary to follow six rules. How these rules are applied is illustrated using a four input 16-cell map shown in Fig.

Groups can only contain 1, 2, 4, 8, 16 or 32 etc. This helps make smaller groups as large as possible, which is an advantage in finding the simplest solution. 3, so larger groups can be made by grouping cells across the top and bottom or left and right edges of the map. There should be as few groups as possible. 2, 3 and 4 and shows three groups containing 8, 4 and 2 cells. This will simplify the circuit being produced, but it is not optimum.